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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Logic Synthesis for Vlsi-Based Combined Finite State Machines: Synthesis Targeting Asics, Cplds and FPGAs

Logic Synthesis for Vlsi-Based Combined Finite State Machines: Synthesis Targeting Asics, Cplds and FPGAs

Barkalov, Alexander
Titarenko, Larysa
Mielcarek, Kamil

Paperback

Series: Lecture Notes in Electrical Engineering, Book 922

Technology & Engineering

ISBN10: 3031160290
ISBN13: 9783031160295
Publisher: Springer
Published: Nov 26 2023
Pages: 291
Weight: 0.96
Height: 0.65 Width: 6.14 Depth: 9.21
Language: English
The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.

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