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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Timing Optimization Through Clock Skew Scheduling

Timing Optimization Through Clock Skew Scheduling

Kourtev, Ivan S.
Taskin, Baris
Friedman, Eby G.

Hardcover

Technology & EngineeringGeneral Computers

ISBN10: 0387710558
ISBN13: 9780387710556
Publisher: Springer Nature
Published: Nov 21 2008
Pages: 266
Weight: 1.27
Height: 0.69 Width: 6.14 Depth: 9.21
Language: English

The focus of this book is on timing analysis and optimization techniques for circuits with level-sensitive memory elements (registers). Level-sensitive registers are becoming significantly more popular in practice as integrated circuit densities are increasing and the 'performance-per-power' metric for integrated circuits becomes a key issue. Therefore, techniques for understanding level-sensitive based circuits and for optimizing the performance of such circuits are increasingly important. The book contains a linear programming formulation applicable to the timing analysis of large scale circuits. It includes a delay insertion methodology, and offers an overview of circuit partitioning, placement, and synchronization methodologies that enables the implementation of high speed, low power circuits synchronized with ultra-modern resonant clocking technology.

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