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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Simulated Annealing for VLSI Design

Simulated Annealing for VLSI Design

Wong, D. F.
Leong, H. W.
Liu, H. W.

Paperback

Series: The Springer International Engineering and Computer Science, Book 42

Technology & EngineeringGeneral ComputersGeneral Mathematics

ISBN10: 1461289475
ISBN13: 9781461289470
Publisher: Springer Nature
Published: Oct 5 2011
Pages: 202
Weight: 0.69
Height: 0.46 Width: 6.14 Depth: 9.21
Language: English
This monograph represents a summary of our work in the last two years in applying the method of simulated annealing to the solution of problems that arise in the physical design of VLSI circuits. Our study is experimental in nature, in that we are con- cerned with issues such as solution representations, neighborhood structures, cost functions, approximation schemes, and so on, in order to obtain good design results in a reasonable amount of com- putation time. We hope that our experiences with the techniques we employed, some of which indeed bear certain similarities for different problems, could be useful as hints and guides for other researchers in applying the method to the solution of other prob- lems. Work reported in this monograph was partially supported by the National Science Foundation under grant MIP 87-03273, by the Semiconductor Research Corporation under contract 87-DP- 109, by a grant from the General Electric Company, and by a grant from the Sandia Laboratories.

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