Open Daily: 10am - 10pm | Alley door pickup 10am - 7pm 3038 Hennepin Ave Minneapolis, MN
612-822-4611

  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Network -On-Chip (NOC) Design Using FPGA Technology

Network -On-Chip (NOC) Design Using FPGA Technology

Jain, Manish

Paperback

Technology & Engineering

ISBN10: 613891936X
ISBN13: 9786138919360
Publisher: Blues Kids Of Amer
Published: Dec 19 2019
Pages: 76
Weight: 0.27
Height: 0.18 Width: 6.00 Depth: 9.00
Language: English
NoC is new paradigm for System-on-chip (SoC) design. NoC based system accommodate multiple asynchronous clocking that many of today's complex SoC design use.The NoC solutions bring a Networking method on-chip communication and claim roughly a performance increases over conventional bus system. As a systematic approach, Network-on-Chip (NoC) called also Network-on-Silicon, proposes networks as a scalable, reusable and global communication architecture to overcome the pains of future System-on-Chip.The idea of NoC is derived from large-scale computer networks and distributed computing. However, the routing techniques for NoC have some unique design considerations besides low latency and high throughput. Due to tight constraints on memory and computing resources, the routing techniques for NoC should be reasonably simple. Several switch architectures have been developed for NoC employing XY output selection and wormhole routing.NoC is a layered approach for on-chip communication design proposed in literature to cope with issues of current SoC architectures. A scalable communication infrastructure that better supports the trend of SoC integration consists of an on-chip packet-swit.

Also in

Technology & Engineering

View All