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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
High Performance and Energy Efficient Many-core DSP Systems An Asynchronous Array of Simple Processors

High Performance and Energy Efficient Many-core DSP Systems An Asynchronous Array of Simple Processors

Yu, Zhiyi
Baas, Bevan

Paperback

Technology & Engineering

ISBN10: 3639098595
ISBN13: 9783639098594
Publisher: Blues Kids Of Amer
Published: Dec 1 2008
Pages: 172
Weight: 0.52
Height: 0.37 Width: 6.00 Depth: 9.00
Language: English
This book investigates the architecture design, physical implementation, result evaluation, and feature analysis of a many-core processor for DSP applications. The system is composed of a 2-D array of simple single-issue programmable processors interconnected by a reconfigurable mesh network, and processors operate completely asynchronously with respect to each other in a Globally Asynchronous Locally Synchronous fashion. The processor is called Asynchronous Array of simple Processors (AsAP). A 6×6 array has been fabricated in a 0.18 m CMOS technology. The physical design concerns timing issues for robust implementations, and takes full advantages of their potential scalability. Each processor occupies 0.66 mm , is fully functional at a clock rate of 520-540 MHz under 1.8 V, and dissipates 94 mW while the clock is 100% active. The system is also easily scalable, and is well- suited to future fabrication technologies.

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