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Hardware Architectures for Post-Quantum Digital Signature Schemes
Paperback
Technology & EngineeringGeneral Computers
ISBN13: 9783030576844
Publisher: Springer Nature
Published: Oct 28 2021
Pages: 170
Weight: 0.61
Height: 0.41 Width: 6.14 Depth: 9.21
Language: English
This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.
- Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;
- Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;
- Enables designers to build hardware implementations that are resilient to a variety of side-channels.
1 different editions
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Hardware Architectures for Post-Quantum Digital Signature Schemes
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Soni, Deepraj
Hardware Architectures for Post-Quantum Digital Signature Schemes
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Basu, Kanad
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