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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation

High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation

Palchaudhuri, Ayan
Chakraborty, Rajat Subhra

Hardcover

Series: Springer Advanced Microelectronics, Book 51

Technology & EngineeringGeneral Computers

ISBN10: 8132225198
ISBN13: 9788132225195
Publisher: Springer Nature
Published: Jul 16 2015
Pages: 114
Weight: 0.81
Height: 0.38 Width: 6.14 Depth: 9.21
Language: English
This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary User Constraints File. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.

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