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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
High-Level Power Analysis and Optimization

High-Level Power Analysis and Optimization

Raghunathan, Anand
Dey, Sujit
Jha, Niraj K.

Hardcover

Technology & EngineeringGeneral Computers

ISBN10: 0792380738
ISBN13: 9780792380733
Publisher: Springer Nature
Published: Nov 30 1997
Pages: 175
Weight: 1.25
Height: 0.50 Width: 7.00 Depth: 10.00
Language: English
High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

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