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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Granular Nanoelectronics

Granular Nanoelectronics

Barker, John R.
Ferry, David K.
Jacoboni, Carlo

Paperback

Series: NATO Science Series B:, Book 251

Technology & EngineeringGeneral SciencePhysics

ISBN10: 1489936912
ISBN13: 9781489936912
Publisher: Springer
Published: Jan 3 2014
Pages: 590
Weight: 1.85
Height: 1.23 Width: 6.14 Depth: 9.21
Language: English
The technological means now exists for approaching the fundamentallimiting scales of solid state electronics in which a single carrier can, in principle, represent a single bit in an information flow. In this light, the prospect of chemically, or biologically, engineered molccular-scale structures which might support information processing functions has enticed workers for many years. The one common factor in all suggested molecular switches, ranging from the experimentally feasible proton-tunneling structure, to natural systems such as the micro-tubule, is that each proposed structure deals with individual information carrying entities. Whereas this future molecular electronics faces enormous technical challenges, the same Iimit is already appearing in existing semiconducting quantum wires and small tunneling structures, both superconducting and normal meta! devices, in which the motion of a single eh arge through the tunneling barrier can produce a sufficient voltage change to cut-off further tunneling current. We may compare the above situation with today's Si microelectronics, where each bit is encoded as a very !arge number, not necessarily fixed, of electrons within acharge pulse. The associated reservoirs and sinks of charge carriers may be profitably tapped and manipulated to proviele macro-currents which can be readily amplified or curtailed. On the other band, modern semiconductor ULSI has progressed by adopting a linear scaling principle to the down-sizing of individual semiconductor devices.

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