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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Die-Stacking Architecture

Die-Stacking Architecture

Zhao, Jishen
Xie, Yuan

Paperback

Series: Synthesis Lectures on Computer Architecture

Technology & EngineeringGeneral Computers

ISBN10: 3031006194
ISBN13: 9783031006197
Publisher: Springer Nature
Published: Jun 10 2015
Pages: 113
Weight: 0.51
Height: 0.27 Width: 7.50 Depth: 9.25
Language: English
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the memory wall problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

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