Open Daily: 10am - 10pm | Alley door pickup 10am - 7pm 3038 Hennepin Ave Minneapolis, MN
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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Creating Assertion-Based IP

Creating Assertion-Based IP

Foster, Harry D.
Krolnik, Adam C.

Paperback

Series: Integrated Circuits and Systems

Technology & EngineeringGeneral Computers

ISBN10: 1441942181
ISBN13: 9781441942180
Publisher: Springer Nature
Published: Nov 19 2010
Pages: 318
Weight: 1.04
Height: 0.70 Width: 6.14 Depth: 9.21
Language: English

A project's functional verification testplan is the specification for the verification process. Developing this testplan usually involves the entire engineering team (architects, designers, and verification engineers). This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. This is the first book published on this subject. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions. Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP.

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