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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (Sdc)

Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (Sdc)

Gangadharan, Sridhar
Churiwala, Sanjay

Paperback

Technology & EngineeringGeneral Computers

ISBN10: 1489989161
ISBN13: 9781489989161
Publisher: Springer Nature
Published: Jun 23 2015
Pages: 226
Weight: 0.80
Height: 0.54 Width: 6.14 Depth: 9.21
Language: English
This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing. Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.

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