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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Completion Detection in Asynchronous Circuits: Toward Solution of Clock-Related Design Challenges

Completion Detection in Asynchronous Circuits: Toward Solution of Clock-Related Design Challenges

Srivastava, Pallavi

Hardcover

Technology & EngineeringGeneral Computers

ISBN10: 3031183967
ISBN13: 9783031183966
Publisher: Springer Nature
Published: Nov 10 2022
Pages: 119
Weight: 0.82
Height: 0.38 Width: 6.14 Depth: 9.21
Language: English

This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.

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