Open Daily: 10am - 10pm | Alley door pickup 10am - 7pm 3038 Hennepin Ave Minneapolis, MN
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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Built-In Test For VLSI

Built-In Test For VLSI

Bardell

Hardcover

Technology & Engineering

ISBN10: 0471624632
ISBN13: 9780471624639
Publisher: John Wiley & Sons
Published: Oct 6 1987
Pages: 368
Weight: 1.46
Height: 0.88 Width: 6.39 Depth: 9.58
Language: English
This handbook provides ready access to all of the major concepts, techniques, problems and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. The main intention of this book is to present the material in a unified manner, making it a useful source for practising professionals and students alike. It opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, reviewing by comparison the principles of design for testability of more advanced digital technology. It then offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing; and various data compression methods, such as polynomial dividers and unique shift-register sequence generators with special applications.

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