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Behavioral Synthesis for Hardware Security

Behavioral Synthesis for Hardware Security

Hardcover

Technology & EngineeringGeneral Computers

ISBN10: 3030788407
ISBN13: 9783030788407
Publisher: Springer Nature
Published: Feb 9 2022
Pages: 398
Weight: 1.67
Height: 0.94 Width: 6.14 Depth: 9.21
Language: English
Introduction.- Background.- Techniques for algorithm-level obfuscation during high-level synthesis.- High-level synthesis of key based obfuscated RTL datapaths.- RTL Hardware IP protection Using Key-Based Control and Data Flow Obfuscation.- Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility.- Behavioral synthesis techniques for intellectual property protection.- Exploring Low Cost Optimal Watermark for Reusable IP Cores During High Level Synthesis.- High-Level Synthesis for Side-Channel Defense.- On state encoding against power analysis attacks for finite state controllers.- Examining the consequences of high-level synthesis optimizations on power side-channel.- Towards a timing attack aware high-level synthesis of integrated circuits.- High-Level Synthesis with Timing-Sensitive Information Flow Enforcement.- Mitigating information leakage during critical communication using S*FSM.- Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security-Driven Task Scheduling.- Securing industrial control system with high level synthesis.- Conclusions and open research problems.

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