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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Design, Analysis and Test of Logic Circuits Under Uncertainty

Design, Analysis and Test of Logic Circuits Under Uncertainty

Krishnaswamy, Smita
Hayes, John P.
Markov, Igor L.

Hardcover

Series: Lecture Notes in Electrical Engineering, Book 115

Technology & EngineeringGeneral Computers

ISBN10: 9048196434
ISBN13: 9789048196432
Publisher: Springer Nature
Published: Sep 21 2012
Pages: 124
Weight: 0.80
Height: 0.50 Width: 6.00 Depth: 9.20
Language: English
Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.

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