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612-822-4611
Formal Verification: An Essential Toolkit for Modern VLSI Design

Formal Verification: An Essential Toolkit for Modern VLSI Design

Paperback

General ComputersProgramming

Currently unavailable to order

ISBN10: 0323956122
ISBN13: 9780323956123
Publisher: Morgan Kaufmann Publishers
Published: May 26 2023
Pages: 424
Weight: 1.90
Height: 0.79 Width: 7.40 Depth: 9.21
Language: English

Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mathematically explore the quality or other aspects of a Register Transfer Level (RTL) design without using simulations. This can reduce time spent validating designs and more quickly reach a final design for manufacturing. Building on a basic knowledge of SystemVerilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes.

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