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612-822-4611
CMOS VLSI Layout and Verification of a SIMD Computer

CMOS VLSI Layout and Verification of a SIMD Computer

Paperback

General Education

ISBN10: 1288910304
ISBN13: 9781288910304
Publisher: Biblioscholar
Published: Mar 12 2013
Pages: 78
Weight: 0.34
Height: 0.16 Width: 7.44 Depth: 9.69
Language: English
A CMOS VLSI layout and verification of a 3 x 3 processor parallel computer has been completed. The layout was done using the MAGIC tool and the verification using HSPICE. Suggestions for expanding the computer into a million processor network are presented. Many problems that might be encountered when implementing a massively parallel computer are discussed.

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General Education