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CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test
Hardcover
Series: Frontiers in Electronic Testing, Book 40
Technology & EngineeringGeneral Computers
ISBN13: 9781402083624
Publisher: Springer
Published: Jun 21 2008
Pages: 194
Weight: 1.05
Height: 0.50 Width: 6.14 Depth: 9.21
Language: English
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.
1 different editions
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CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test
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Sachdev, Manoj
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Pavlov, Andrei
CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test
Pavlov, Andrei
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