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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Design Automation for Timing-Driven Layout Synthesis

Design Automation for Timing-Driven Layout Synthesis

Sapatnekar, S.
Sung-Mo (Steve) Kang

Paperback

Series: The Springer International Engineering and Computer Science, Book 198

Technology & EngineeringGeneral ComputersGeneral Gardening

ISBN10: 1461363934
ISBN13: 9781461363934
Publisher: Springer Nature
Published: Oct 4 2012
Pages: 269
Weight: 0.92
Height: 0.62 Width: 6.14 Depth: 9.21
Language: English
Moore's law [Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of years. Only recently has the level of integration be- gun to slow down somewhat due to the physical limits of integration technology. Advances in silicon technology have allowed Ie design- ers to integrate more than a few million transistors on a chip; even a whole system of moderate complexity can now be implemented on a single chip. To keep pace with the increasing complexity in very large scale integrated (VLSI) circuits, the productivity of chip designers would have to increase at the same rate as the level of integration. Without such an increase in productivity, the design of complex systems might not be achievable within a reasonable time-frame. The rapidly increasing complexity of VLSI circuits has made de- 1 2 INTRODUCTION sign automation an absolute necessity, since the required increase in productivity can only be accomplished with the use of sophisticated design tools. Such tools also enable designers to perform trade-off analyses of different logic implementations and to make well-informed design decisions.

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