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A Guide to VHDL

A Guide to VHDL

Paperback

General ComputersGeneral Gardening

ISBN10: 1475721161
ISBN13: 9781475721164
Publisher: Springer Nature
Published: Mar 6 2013
Pages: 314
Weight: 1.30
Height: 0.71 Width: 7.00 Depth: 10.00
Language: English
A Guide to VHDL is intended for the working engineer who needs to develop, document, simulate and synthesize a design using the VHDL language. It is for system and chip designers who are working with VHDL CAD tools, and who have some experience programming in Fortran, Pascal, or C and have used a logic simulator.
A Guide to VHDL includes a number of paper exercises and computer lab experiments. If a compiler/simulator is available to the reader, then the lab exercises invluded in the chapters can be run to reinforce the learning experience. For practical purposes, this book keeps simulator-specific text to a minimum, but does use the Synopsys VHDL Simulator command language in a few cases.
A Guide to VHDL can be used as a primer, since its contents are appropriate for an introductory course in VHDL.

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