• Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
RISC-V Architecture and DSP Processor Design: Design and implement a high-performance RISC-V DSP core from ISA to SoC

RISC-V Architecture and DSP Processor Design: Design and implement a high-performance RISC-V DSP core from ISA to SoC

Paperback

General ComputersOperating Systems

ISBN10: 1807600890
ISBN13: 9781807600891
Publisher: Packt Publishing
Published: Apr 30 2026
Pages: 280
Weight: 1.07
Height: 0.59 Width: 7.50 Depth: 9.25
Language: English

Explore the design of a RISC-V DSP processor using the SpringCore architecture, covering pipeline design, DSP acceleration, LLVM toolchain support, debugging with OpenOCD, and integration into a real SoC

Key Features:

- Explore the SpringCore RISC-V DSP architecture and its custom ISA extensions

Also in

General Computers