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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

Dunn, Ian N.
Meyer, Gerard G. L.

Paperback

Series: Computer Science

AlgebraGeneral Computers

ISBN10: 1461346584
ISBN13: 9781461346586
Publisher: Springer Nature
Published: Sep 5 2012
Pages: 108
Weight: 0.41
Height: 0.26 Width: 6.14 Depth: 9.21
Language: English

Despite five decades of research, parallel computing remains an exotic, frontier technology on the fringes of mainstream computing. Its much-heralded triumph over sequential computing has yet to materialize. This is in spite of the fact that the processing needs of many signal processing applications continue to eclipse the capabilities of sequential computing. The culprit is largely the software development environment. Fundamental shortcomings in the development environment of many parallel computer architectures thwart the adoption of parallel computing. Foremost, parallel computing has no unifying model to accurately predict the execution time of algorithms on parallel architectures. Cost and scarce programming resources prohibit deploying multiple algorithms and partitioning strategies in an attempt to find the fastest solution. As a consequence, algorithm design is largely an intuitive art form dominated by practitioners who specialize in a particular computer architecture. This, coupled with the fact that parallel computer architectures rarely last more than a couple of years, makes for a complex and challenging design environment.

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