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Modern GPU Architecture Third Edition: Volume 1 - Foundations and the Graphics Pipeline
Paperback
Series: Gpu Expert Engineering: Mastering Design, Programming, and Optimization
General ComputersIndustrial Design
Publisher: Independently Published
Published: Jul 1 2026
Pages: 354
Weight: 1.81
Height: 0.74 Width: 8.50 Depth: 11.00
Language: English
Modern GPU Architecture - Volume 1: Foundations and the Graphics Pipeline
Most GPU books stop at the surface.
They explain shaders, APIs, rendering concepts, or CUDA programming - but they rarely show how the machine underneath actually works.
This book goes deeper.
Modern GPU Architecture - Volume 1 is written for readers who want to understand the GPU as hardware: how geometry becomes pixels, how SIMT execution hides latency, how shader cores schedule work, how rasterizers make coverage decisions, how memory systems feed thousands of parallel lanes, and how the render-output pipeline commits the final image.
This is not a light overview of graphics programming.
It is a hardware-focused guide to the architecture behind the graphics pipeline, backed by synthesizable Verilog and SystemVerilog examples that connect theory to real digital design structures.
Inside Volume 1, you will learn how GPUs are built from the inside out:
Why GPUs favor throughput over single-thread latency
How SIMT execution groups scalar threads into warps and wavefronts
How divergence, masking, reconvergence, and scheduling affect real utilization
How Verilog and SystemVerilog express synthesizable GPU hardware
How valid-ready handshakes, pipelines, CDC logic, FIFOs, and testbenches work in RTL
How 3D geometry, transformations, clipping, and rasterization become hardware datapaths
How triangle setup, edge functions, fixed-point arithmetic, and tile-based scan conversion operate
How fragment processing, texturing, filtering, blending, and depth testing fit into the pipeline
How shader cores organize schedulers, register files, execution lanes, divergence control, and instruction flow
How GPU memory subsystems handle coalescing, shared memory, L1/L2 caches, DRAM controllers, and atomic operations
How the render-output pipeline performs depth/stencil testing, blending, MSAA resolve, compression, and framebuffer writeback
This book is for you if you are:
An FPGA or RTL hobbyist who wants to build and understand GPU-like hardware
A computer engineering student who wants more than textbook CPU architecture
A graphics programmer who understands shaders and wants to know what the silicon is doing
A CUDA, HPC, or AI performance reader who wants to understand the layer beneath the software stack
An early-career ASIC, RTL, or verification engineer looking for a clear architectural map of GPU pipeline hardware
The difference is simple:
Most resources tell you what the GPU does.
This book shows you how the GPU is organized to do it.
From throughput-first design philosophy to shader-core control logic, from rasterization mathematics to fixed-point hardware, from memory coalescing to render-output behavior, Modern GPU Architecture - Volume 1 gives you the architectural foundation needed to read a GPU as an engineer rather than as a user.
If you want a shallow introduction, this is not it.
If you want to understand the graphics pipeline as real hardware - with RTL concepts, datapaths, control signals, scheduling logic, memory hierarchy, and verification discipline - this volume was written for you.
Start with Volume 1 and build the foundation: the complete geometry-to-pixels path of modern GPU architecture.
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