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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
The Mips-X RISC Microprocessor

The Mips-X RISC Microprocessor

Chow, Paul

Hardcover

Series: The Springer International Engineering and Computer Science, Book 81

Technology & EngineeringGeneral Computers

ISBN10: 0792390458
ISBN13: 9780792390459
Publisher: Springer Nature
Published: Oct 31 1989
Pages: 232
Weight: 1.19
Height: 0.63 Width: 6.14 Depth: 9.21
Language: English
The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de- signs and to boost the performance level by over a factor of five.

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