Open Daily: 10am - 10pm | Alley door pickup 10am - 7pm 3038 Hennepin Ave Minneapolis, MN
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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication

Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication

Shen, Jih-Sheng
Hsiung, Pao-Ann

Hardcover

Series: Premier Reference Source

Technology & EngineeringGeneral ComputersNetworking

ISBN10: 1615208070
ISBN13: 9781615208074
Publisher: Igi Global Scientific Publishing
Published: Jun 30 2010
Pages: 386
Weight: 2.85
Height: 1.10 Width: 8.70 Depth: 11.20
Language: English
Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication is the one of the first compilations written to demonstrate this future for network -on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, this book represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field.

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