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  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
Algorithms for Synthesis and Testing of Asynchronous Circuits

Algorithms for Synthesis and Testing of Asynchronous Circuits

Lavagno, Luciano
Sangiovanni-Vincentelli, Alberto L.

Hardcover

Series: The Springer International Engineering and Computer Science, Book 232

Technology & EngineeringGeneral Computers

ISBN10: 0792393643
ISBN13: 9780792393641
Publisher: Springer Nature
Published: Jun 30 1993
Pages: 339
Weight: 1.57
Height: 1.06 Width: 6.64 Depth: 9.56
Language: English
Since the second half of the 1980s asynchronous circuits have been the subject of a great deal of research following a period of relative oblivion. The lack of interest in asynchronous techniques was motivated by the progressive shift towards synchronous design techniques that had much more structure and were much easier to verify and synthesize. System design requirements made it impossible to eliminate totally the use of asynchronous circuits. Given the objective difficulty encountered by designers, the asynchronous components of electronic systems such as interfaces became a serious bottleneck in the design process. The use of new models and some theoretical breakthroughs made it possible to develop asynchronous design techniques that were reliable and effective. This book describes a variety of mathematical models and of algorithms that form the backbone and the body of a new design methodology for asyn- chronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in ex- ploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms. While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design.

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