Open Daily: 10am - 10pm | Alley door pickup 10am - 7pm 3038 Hennepin Ave Minneapolis, MN
612-822-4611

  • Open Daily: 10am - 10pm
    Alley-side Pickup: 10am - 7pm

    3038 Hennepin Ave Minneapolis, MN
    612-822-4611

Open Daily: 10am - 10pm | Alley-side Pickup: 10am - 7pm
3038 Hennepin Ave Minneapolis, MN
612-822-4611
ASIC and FPGA Verification: A Guide to Component Modeling

ASIC and FPGA Verification: A Guide to Component Modeling

Munden, Richard

Paperback

Series: Systems on Silicon

Technology & EngineeringGeneral Computers

ISBN10: 0125105819
ISBN13: 9780125105811
Publisher: Morgan Kaufmann Publ Inc
Published: Sep 1 2004
Pages: 336
Weight: 1.80
Height: 0.92 Width: 7.68 Depth: 9.48
Language: English
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs.

ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

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